Difficulty: Introductory to Intermediate | Prerequisites: basic understanding of number systems (binary vs decimal), familiarity with logic gates (AND, OR, XOR, NOT).
This unit sits at the heart of digital electronics: how a computer does maths with nothing but 0s and 1s. Everything here feeds directly into processor design, so if you are studying computer architecture or embedded systems later, this is foundational. You should already be comfortable converting between binary and decimal and know what a logic gate does, even if you have not yet wired one up.
A digital calculator is built from four arithmetic modules: an adder, a subtractor, a multiplier, and a divider, all operating in binary. The adder is the most fundamental, since subtraction reuses it via two's complement. These modules are combined inside an Arithmetic Logic Unit (ALU), which a control unit and multiplexer coordinate to select the right operation.
Half adder
A combinational circuit that adds two single-bit binary inputs and produces a sum (via XOR) and a carry (via AND). Think of it as the simplest possible addition circuit: two bits in, two bits out, no memory of anything that came before.
Full adder
A combinational circuit that adds two single-bit binary inputs plus a carry-in from a previous stage, producing a sum and a carry-out. In simple terms, this is the half adder's grown-up sibling: it can chain with others to handle multi-bit numbers.
Ripple-carry adder
A multi-bit adder built by connecting full adders in series, where the carry-out of each stage feeds into the carry-in of the next. Think of it as a bucket brigade: each adder waits for the one before it to pass along the carry.
Two's complement
A method for representing negative numbers in binary. You invert every bit of the number (forming the one's complement) and then add 1. In simple terms, this is how computers turn subtraction into addition: negate the second number using two's complement, then add.
One's complement
The result of flipping every bit in a binary number (0 becomes 1, 1 becomes 0). It is the intermediate step on the way to two's complement.
Multiplicand
The number being multiplied (the top number in a long multiplication layout).
Multiplier
The number you multiply by (the bottom number). Each of its bits determines whether a shifted copy of the multiplicand is added to the running total.
Arithmetic Logic Unit (ALU)
The part of a processor that performs all arithmetic (add, subtract, multiply, divide) and logical (AND, OR, NOT) operations. Think of it as the calculator inside the CPU.
Control unit
The component that reads the user's selected operation and sends the correct control signal to the ALU. It decides what the ALU does on each clock cycle.
Multiplexer (MUX)
A selector circuit that takes multiple inputs and forwards exactly one to its output, chosen by a control signal. In a calculator, the MUX picks the result from the correct arithmetic module (adder, subtractor, multiplier, or divider) and sends it to the display.
Half adder
Adds two single-bit inputs (A and B)
Produces two outputs:
Sum = A XOR B
Carry = A AND B
Example: 1 + 0 gives Sum = 1, Carry = 0. But 1 + 1 gives Sum = 0, Carry = 1 (binary 10, i.e. decimal 2).
Limitation: no carry-in input, so it cannot be used for multi-bit addition on its own.
Full adder
Adds two single-bit inputs (A and B) plus a carry-in (C_in) from a previous stage
Produces:
Sum = A XOR B XOR C_in
Carry-out (C_out) = (A AND B) OR (C_in AND (A XOR B))
Because it accepts a carry-in, full adders can be chained together to add numbers of any bit width.
Ripple-carry adder
Built by connecting N full adders in series (one per bit)
The carry-out of bit 0 feeds into the carry-in of bit 1, and so on up the chain
Worked example: 1101₂ (13) + 1011₂ (11)
Column by column from right to left, carries ripple through
Result: 11000₂ = 24 in decimal
Trade-off: simple and cheap to build, but slow for large bit widths because the final sum is not ready until the carry has propagated through every stage.
Subtraction in digital circuits is not performed by a dedicated subtractor. Instead, the same adder circuit handles it by converting the problem into addition using two's complement.
Steps to subtract A − B:
Invert every bit of B (this gives the one's complement)
Add 1 to the result (this gives the two's complement of B)
Add the two's complement of B to A using the normal adder
If the result has an extra carry bit beyond the original bit width, discard it
Worked example: 1101₂ (13) − 1011₂ (11)
One's complement of 1011 = 0100
Add 1: 0100 + 1 = 0101 (two's complement)
Add to the first number: 1101 + 0101 = 10010
Discard the leftmost carry: result = 0010₂ = 2 in decimal
This is a significant design advantage. A single control signal flips the circuit between addition and subtraction, which halves the hardware needed.
Binary multiplication follows the same long-multiplication method you know from decimal, but simpler: each partial product is either the multiplicand itself (when the multiplier bit is 1) or zero (when the multiplier bit is 0).
Process:
Examine each bit of the multiplier from right to left
If the bit is 1, write a shifted copy of the multiplicand
If the bit is 0, write all zeros for that row
Sum all partial products
Worked example: 1101₂ (13) × 1011₂ (11)
Bit 0 of multiplier is 1: partial product = 1101 (no shift)
Bit 1 is 1: partial product = 1101, shifted one position left
Bit 2 is 0: partial product = 0000, shifted two positions left
Bit 3 is 1: partial product = 1101, shifted three positions left
Sum of all partial products = 10001111₂ = 143 in decimal
In hardware, the shift-and-add operations run in parallel across multiple adder stages, which is why digital circuits perform multiplication far faster than doing it by hand.
Binary division uses repeated subtraction. The divider subtracts the divisor from the dividend repeatedly until the remaining value is smaller than the divisor. The count of successful subtractions is the quotient; whatever is left is the remainder.
Worked example: 1111₂ (15) ÷ 0011₂ (3)
15 − 3 = 12
12 − 3 = 9
9 − 3 = 6
6 − 3 = 3
3 − 3 = 0
Five subtractions, nothing left over
Quotient = 0101₂ (5), Remainder = 0000₂ (0)
This repeated-subtraction approach is conceptually simple but slow for large numbers. More advanced division algorithms (such as restoring and non-restoring division) improve speed in real processors.
The four arithmetic modules do not work in isolation. In a real processor or calculator, they sit inside the Arithmetic Logic Unit (ALU).
How the pieces fit together:
The control unit reads the operation the user has selected (add, subtract, multiply, or divide) and generates the appropriate control signal
The input numbers are fed to all four arithmetic modules simultaneously
Each module computes its result in parallel
A multiplexer (MUX) uses the control signal to select the correct module's output and forwards it to the display or the next stage of processing
This architecture means the calculator does not need to route data to different circuits depending on the operation. Everything runs at once; the MUX just picks the answer that matches the request.
Why binary?
Transistors, the fundamental building blocks of digital circuits, have two states: on and off. Binary maps directly onto this, which makes hardware simpler, faster, more reliable, and cheaper to manufacture. The trade-off is that binary representations are longer than decimal ones (255 in decimal = 11111111 in binary), so calculators and computers convert back to decimal before displaying results to the user.
Half adder
Sum = A XOR B
Carry = A AND B
Full adder
Sum = A XOR B XOR C_in
C_out = (A AND B) OR (C_in AND (A XOR B))
Two's complement of a number B (n bits)
Invert all bits of B, then add 1
Equivalently: 2ⁿ − B
Subtraction using two's complement
A − B = A + (two's complement of B)
Discard any carry beyond the nth bit
Every arithmetic operation your phone, laptop, or games console performs passes through circuits built on these exact principles. The ALU inside an Intel or ARM processor is, at bottom, a scaled-up version of the adder/subtractor/multiplier/divider architecture described here. Embedded systems in cars, medical devices, and industrial controllers all rely on binary arithmetic modules for real-time calculations.
Students often think the half adder can handle multi-bit addition. It cannot, because it has no carry-in input. Multi-bit addition requires full adders.
Students sometimes forget to discard the extra carry bit after a two's complement subtraction. If A − B is positive and you are working in n bits, the (n+1)th bit is discarded; the remaining n bits are your answer.
A common mistake is confusing one's complement with two's complement. One's complement is just the bit inversion step. Two's complement adds 1 on top of that, and it is two's complement that gives you the correct negative representation.
Students occasionally assume that binary multiplication produces the same number of bits as the inputs. In fact, multiplying two n-bit numbers can produce a result up to 2n bits wide.
⚠️ Be ready to perform a full two's complement subtraction by hand, step by step (invert, add 1, add, discard carry). This is a near-certain exam question.
⚠️ Know the difference between a half adder and a full adder, and be able to explain why the full adder is needed for multi-bit addition.
⚠️ Be able to trace through a binary long multiplication and produce the correct partial products and final sum.
⚠️ Understand the role of each component in the calculator architecture: ALU, control unit, MUX. Exams often ask you to explain how these work together.
⚠️ The ripple-carry adder's speed limitation (carry propagation delay) is commonly tested. Know what it is and why it matters.
True or false: A half adder can accept a carry-in from a previous stage. (False)
Fill in the blank: The two's complement of a binary number is found by inverting all bits and then adding ___. (1)
True or false: In a ripple-carry adder, all bits are computed simultaneously. (False; each stage waits for the carry from the previous one.)
Fill in the blank: A multiplexer in a calculator selects the output of the correct ___ module. (arithmetic)
True or false: Multiplying two 4-bit numbers can produce a result wider than 4 bits. (True; up to 8 bits.)
Q: What are the two outputs of a half adder, and which logic gates produce them?
A: Sum (produced by XOR) and Carry (produced by AND).
Q: Perform the subtraction 1010₂ − 0110₂ using two's complement.
A: One's complement of 0110 = 1001. Add 1 = 1010. Now add: 1010 + 1010 = 10100. Discard the carry: 0100₂ = 4 in decimal.
Q: Why is the ripple-carry adder considered slow for large bit widths?
A: Because the carry must propagate through each full adder stage sequentially. The final sum is not valid until the carry has rippled all the way from bit 0 to the most significant bit.
Q: Multiply 101₂ by 110₂ using binary long multiplication.
A: Partial products: 000 (bit 0 = 0), 101 shifted left one (bit 1 = 1), 101 shifted left two (bit 2 = 1). Sum = 11110₂ = 30 in decimal.
Q: Explain how the ALU, control unit, and MUX work together in a calculator.
A: The control unit reads the user's chosen operation and generates a control signal. All arithmetic modules inside the ALU receive the input numbers and compute their results in parallel. The MUX uses the control signal to select the correct module's output and forward it to the display.
This material connects directly to CPU architecture: the ALU described here is the same ALU you will study when you look at how a processor executes instructions. Understanding carry propagation leads into topics on faster adder designs (carry-lookahead, carry-select) covered in more advanced digital design courses. Two's complement representation is also essential for understanding signed integer storage in programming languages and how overflow errors occur in software.
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